The present invention relates to control circuits for the switching of inductive loads and transistors, and in particular to a high efficiency switching circuit, which may be monolithically integrated, and may be used to drive inductive loads in high-speed printing apparatus and in switching supply devices (also called "chopper supply devices").
Switching circuits of this type generally comprise an output power transistor which is connected in series with the inductive load between the two terminals of a supply voltage source and which is driven alternately from a high voltage and low current state to a low voltage and high current state.
In the first state, the transistor is virtually an open circuit between its emitter and collector terminals (cut-off or "off" state), and in the second state, it is a short circuit (conducting or "on" state), thereby respectively preventing or enabling the flow of current through the inductive load.
The mode of operation of the transistor which comes closest to the operation of an ideal switch is that in which the transistor operates at saturation in the closed state and is cut off in the open state.
The maximum possible switching frequency of the output transistor is, in this case, essentially limited by the effects, during the passage from saturation to cut-off, of the base charge storage which took place during the conducting phase.
A cut-off transient is composed of a first stage in which the transistor remains at saturation, second stage of "quasi-saturation", in which the collector-emitter voltage begins to rise, although the collector current remains constant, and a final stage in which the collector-emitter voltage rises rapidly and the collector current falls to zero. The "quasi-saturation" stage is the stage in which the transistor dissipates the most power.
A reduction of the cut-off time would therefore be advantageous both in order to increase the maximum possible switching frequency and to improve the efficiency of the switching circuit from the power dissipation point of view by reducing the periods of time during which the operation of the output power transistor diverges from that of an ideal switch.
When the switching of the output power transistor is controlled by means of a second transistor coupled thereto, the speed of operation of the circuit also depends on the maximum switching speed of this second transistor which depends, in turn, on the effects described above of the base charge storage, particularly if it operates at saturation when it conducts.
In this case, the resulting restrictions on speed may be considerable, particularly in the case of switching circuits which may be monolithically integrated and comprising a PNP transistor used to drive the output power transistor (which is generally of an NPN type for reasons of integration known to those skilled in the art). The speed restrictions on such a PNP transistor which operates in the active zone of its operating range in its conductive state are significant, since PNP transistors have cut-off times which are longer than those of NPN transistors.
Circuits used to enable a rapid discharge of the charges stored therein when a transistor is cut off are disclosed, for example, in British Patent Specifications No. 2 053 606 and 1 560 354, published on Feb. 4, 1981 and Feb. 6, 1980, respectively.
Furthermore, U.S. Pat. No. 4,549,095 discloses a circuit aimed at reducing the cut-off time of an output power transistor driven to switch by means of a further transistor coupled to its control terminal.
In order to increase the maximum possible switching frequency and to improve the overall efficiency of the circuit, a circuit component for charge extraction is connected to the control terminals of both transistors. This component is enabled so as to extract charges only for a predetermined period of time from the beginning of cut-off of the transistors so as to avoid delays in the subsequent turn on of these transistors. This also prevents an unnecessary use of supply current needed to maintain the charge extraction circuit component in its active state when the output transistor is already completely cut off.
The duration of the enabling period, which may be predetermined at will, is therefore determined independently of the state of the two switching transistors.